Principal Product Engineer - Verification IP at Cadence Design Systems


At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

As a Verification IP Product Engineer your will be expected to be an expert in a specific domain of Verification IP family- protocol and product-wise.
The Product Engineer main role is to help accelerate VIP portfolio adoption at Cadence’s top tier customers by supporting pre-sales technical activities.
To ensure that, one must have strong verification expertise and understand customer design and verification flows.
As a VIP and protocol expert, the Product Engineer drives product knowledge transfer across our field engineers and customer, providing training and developing collaterals.
The Product Engineer will also need to translate high-level requirements from customers into a technical spec and drive the product definition that fits the customer needs.
The Product Engineer is expected to work independently and collaborate with other team members ( RnD, Marketing, support) to ensure all dimensions of the product are aligned.
This role requires approximately 30% travel on average.
Requirements and Qualifications:
  • BSc with Electrical engineering or Computer Science
  • At least 8 years of experience with Verification and Design Experience with Developing Verification environments using System Verilog Familiar with the UVM methodology
  • Familiar with standard protocol preferred PCIe
  • Experience with Unix / Linux environment
  • Very good communication skills, capable to have fluent discussions and communicate with customers.
  • Face to Face and through emails
  • Team orientation, mature work attitude, and good judgment under pressure
  • Customer service approach

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